A field-effect transistor whose gate is a pn junction, controlling channel current through the width of the depletion layer that grows under reverse bias. Most are depletion-mode devices that conduct at a gate voltage of 0 V.
Japanese name: JFET(接合型FET)
JFET (junction field-effect transistor) appears in 2 practice questions across 2 topics, including Analog and electronic circuits, Power semiconductors.
Field: MOSFET
A JFET (junction field-effect transistor) is a field-effect transistor whose gate is formed by a pn junction. In an n-channel JFET, p-type gate regions sit on both sides of an n-type channel connecting source and drain; reverse-biasing the gate-channel junction widens the depletion layer, narrowing the channel and reducing current. Current is highest at a gate voltage of 0 V (IDSS), and when the reverse bias reaches the pinch-off voltage, the channel closes and current almost stops. In the saturation region, drain current is roughly proportional to the square of the difference between the gate voltage and the pinch-off voltage.
A MOSFET separates the gate from the semiconductor with an insulating film, whereas a JFET's gate is a pn junction with no insulator. The junction must be kept reverse-biased; forward-biasing it causes gate current to flow. Reverse-biased gate leakage is small, around pA to nA at room temperature, but because it is junction leakage it rises sharply with temperature. JFETs are also fundamentally normally-on depletion-mode devices, which makes them unsuitable for integrated circuits like CMOS that combine normally-off n-type and p-type transistors. That is why MOSFETs dominate as the transistors in integrated circuits.
In a JFET, current flows inside the channel and is less affected by defects at an insulator interface than in a MOSFET, so low-frequency (1/f) noise tends to be small. This makes JFETs suited to audio preamplifiers, high-impedance input stages of sensors and instruments, and JFET-input op amps with input bias currents in the pA range. The impedance-converting element inside electret condenser microphones and the current-regulating diode, which ties gate to source to pass a constant current, are also based on JFETs.
SiC JFETs offer high breakdown voltage and low on-resistance and are also used as power devices. Because a normally-on device can be hazardous, for instance at power-up, a common approach is a cascode connection in series with a low-voltage Si MOSFET so that the pair can be treated as normally-off. In planar power MOSFETs, the region squeezed between adjacent p-type body regions acts like a JFET and narrows the current path, so its resistance is called JFET resistance. In compound semiconductors such as GaAs, the MESFET, whose gate is a Schottky junction, operates on the same principle.
Answer: B. To cancel the output offset error caused by input bias currents
Input bias current flows into an op-amp's inputs, and the resistance seen from the inverting input (Ri∥Rf) turns it into a voltage drop that appears as output error. Adding an equal resistance at the non-inverting input creates a matching drop that cancels it, leaving only the error from the difference between the two bias currents (the input offset current). Op-amps with CMOS or JFET inputs, whose bias currents are in the pA range, usually do not need this resistor.
Answer: C. Cells can be packed densely to increase channel width and lower on-resistance
In a trench-gate structure the channel forms vertically on trench sidewalls, so more cells fit per unit area than in planar designs, increasing total channel width. It also eliminates the JFET resistance between adjacent planar cells, lowering on-resistance. Trench gates dominate low-voltage silicon MOSFETs and IGBTs and are spreading in SiC MOSFETs (where planar designs also remain widely used), but the field concentrates at the trench-bottom corners, so protective structures there are critical.
A MOSFET isolates the gate from the semiconductor with an insulating film, while a JFET forms its gate from a pn junction. A JFET is fundamentally a depletion-mode device that conducts at 0 V gate voltage and is used with its gate kept reverse-biased. MOSFETs are easy to make normally-off and are used in CMOS integrated circuits.
At 0 V gate voltage, an n-type (or p-type) channel already connects source and drain, so current flows. Current can be reduced only by reverse-biasing the gate to widen the depletion layer.
The gate-channel pn junction becomes forward-biased, and in silicon gate current starts to flow once the voltage exceeds roughly 0.5 V. That loses the JFET's advantage of high input impedance, so the gate is normally used reverse-biased or near 0 V.
Op-amps with CMOS or JFET inputs, whose bias currents are in the pA range, usually do not need this resistor.
In an inverting amplifier using a bipolar-input op-amp, why…It also eliminates the JFET resistance between adjacent planar cells, lowering on-resistance.
What is the main advantage of the trench gate structure in …As an Amazon Associate I earn from qualifying purchases.
Operational amplifier (op-amp) CMOS On-resistance SiC (silicon carbide) Body effect Channel-length modulation DIBL Flat-band voltage GIDL (gate-induced drain leakage) Inversion layer