SRAM and flash memory
When writing to an SRAM cell, one bit line is pulled down to 0 V to flip the cell's state. What condition is required of the access transistor?
- AIt must have sufficiently stronger drive than the pull-up transistor (pMOS) in the cell
- BIt must be weaker than every transistor in the cell
- CIt must always remain off
Show answer and explanation
Answer: A. It must have sufficiently stronger drive than the pull-up transistor (pMOS) in the cell
Writing requires pulling the storage node down to 0 through the access transistor. To do so, it must overpower the pull-up pMOS that tries to keep the node at 1, so the access transistor is designed to be sufficiently stronger than the pMOS. For read stability, on the other hand, it is made weaker than the pull-down nMOS.