Logic circuits
Which correctly describes clock skew in a synchronous circuit?
- AVariation of the clock frequency over time
- BThe difference in the time the clock signal arrives at different flip-flops
- CThe clock signal voltage exceeding the supply voltage
Show answer and explanation
Answer: B. The difference in the time the clock signal arrives at different flip-flops
Clock skew is the difference in arrival time of the same clock at different flip-flops, caused by differences in wire length and load. Large skew can cause setup and hold violations, so clock trees are designed to equalize arrival times.
- A. Time-varying fluctuation of the clock period is called jitter.
- B. Correct. It is the difference in clock arrival time between locations.
- C. Clock skew is not a voltage problem.