I/O Interfaces & Buses

What does a requirement of "bit error rate (BER) at most 10^-12" for a high-speed serial link mean?

  1. AUp to 12 bit errors per second are acceptable
  2. BOne bit in every 12 is wrong
  3. COn average no more than one bit in a trillion is wrong
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Answer: C. On average no more than one bit in a trillion is wrong

The bit error rate is the fraction of transmitted bits that are received incorrectly. 10^-12 means one bit in a trillion; on a 10 Gb/s link that is about one error every 100 seconds on average. Small as it looks, errors still occur fairly often at high speed, so PCI Express and others use data-link retransmission or error correction to keep errors from reaching upper layers.

  • A. It is not a count of errors per unit time.
  • B. That error rate would make communication useless.
  • C. Correct. 10^12 is one trillion.
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More I/O Interfaces & Buses questions

  1. Why are high-speed signal traces designed so that their characteristic impedance matches the transmit and receive circuits?
  2. High-speed links such as 100-gigabit Ethernet are sometimes built by bundling, for example, four 25 Gb/s lanes. Which describes this approach?
  3. What is the purpose of spread-spectrum clocking (SSC), used in PCI Express and elsewhere?
  4. What does it mean that a PCI Express lane is full duplex?
  5. Which describes the credit-based flow control used in PCI Express?