Interconnect processes

In highly scaled LSIs, how has wiring delay trended compared with gate delay?

  1. AWiring delay has become small enough to ignore
  2. BWiring delay and gate delay are unrelated
  3. CWiring delay has grown as a share and has become a factor limiting performance
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Answer: C. Wiring delay has grown as a share and has become a factor limiting performance

Transistors get faster with scaling, but wires become narrower and closer, increasing resistance and capacitance, so wiring delay does not shrink easily. Wiring delay therefore accounts for a growing share of total circuit delay, making improvements in wiring materials and structures and the insertion of repeaters important.

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More Interconnect processes questions

  1. What problem must be watched for when etching or ashing low-k films?
  2. What is the time-dependent dielectric breakdown of the insulator between wires called, which is becoming more important as wire spacing shrinks?
  3. What is the main role of the wiring inside an LSI?
  4. Which correctly describes "multilevel wiring" in an LSI?
  5. Which is closest to the resistivity of copper (Cu) at room temperature? (Bulk value)