DRAM

What is commonly required by DRAM standards when the chip temperature is in the high range (for example, above 85 °C)?

  1. AStop refreshing
  2. BDouble the clock frequency
  3. CRefresh more often (shorten the refresh interval)
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Answer: C. Refresh more often (shorten the refresh interval)

At high temperatures, junction leakage in the cells increases and the data retention time shortens. Many DRAM standards therefore require more frequent refresh in the high-temperature range, for example by halving the refresh interval.

  • A. Stopping refresh would lose data.
  • B. Raising the clock frequency does not solve the retention problem.
  • C. Correct. Retention time is shorter at high temperatures, so refresh is done more often.
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More DRAM questions

  1. As DRAM capacity grows, what tends to become a problem with respect to refresh?
  2. In DRAM cell arrays, which bit-line arrangement places the paired bit lines side by side within the same array?
  3. Which correctly describes the idea of "8n prefetch" used in memories such as DDR4 SDRAM?
  4. In DDR-family DRAM, which feature places termination resistors inside the DRAM chip, with controllable on/off, to suppress signal reflections?
  5. Some DRAM cells have a data retention time that irregularly switches between longer and shorter values over time. What is this phenomenon called?