DRAM

How many 8-bit-wide (x8) DRAM chips are needed per rank to form a 64-bit data bus (without ECC)?

  1. A4
  2. B64
  3. C8
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Answer: C. 8

64 bits ÷ 8 bits = 8, so eight x8 chips accessed together form a 64-bit-wide bus. Modules with ECC typically add one more chip (nine in total) for the check bits.

  • A. Four chips would give only a 32-bit width.
  • B. 64 chips would be needed with 1-bit-wide (x1) chips.
  • C. Correct. 64 ÷ 8 = 8 chips.
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More DRAM questions

  1. In most current PC processors, where is the memory controller that controls DRAM located?
  2. What is commonly required by DRAM standards when the chip temperature is in the high range (for example, above 85 °C)?
  3. As DRAM capacity grows, what tends to become a problem with respect to refresh?
  4. In DRAM cell arrays, which bit-line arrangement places the paired bit lines side by side within the same array?
  5. Which correctly describes the idea of "8n prefetch" used in memories such as DDR4 SDRAM?