A means of detecting faults and moving to a safe state, or containing their effects, before they lead to a hazardous event. Examples include ECC, lockstep CPUs, watchdog timers, voltage and clock monitors, and BIST.
Japanese name: 安全機構
Safety mechanism appears in 6 practice questions across 1 topic, including Automotive Semiconductors and Functional Safety.
Answer: C. 2 FIT
Diagnostic coverage (DC) is the proportion of faults that a safety mechanism can detect or control. The remaining failure rate is 200 × (1 − 0.99) = 200 × 0.01 = 2 FIT. 198 FIT is the failure rate of the faults the safety mechanism can detect, and 0.02 FIT is the result of misplacing the decimal point in the multiplication. Fault coverage in manufacturing test represents the proportion of defective parts found before shipment, whereas diagnostic coverage represents the proportion of faults occurring in use that are detected on the spot.
Answer: B. Two CPU cores execute the same instructions simultaneously, and their outputs are compared every clock cycle; a mismatch is reported as a fault
Lockstep is a scheme in which two identically configured CPU cores run the same program and a comparator checks their outputs against each other. If one result changes due to a bit flip from cosmic rays or a circuit fault, it is detected as a mismatch, giving high diagnostic coverage for CPU faults. Because the two cores do the same work, performance equals that of one core. Comparing two cores alone cannot tell which one is correct, so after detection the system performs a reset or a transition to a safe state.
Diagnostic coverage (DC) is the proportion of faults that a safety mechanism can detect or control.
A safety mechanism with 99% diagnostic coverage is added to…Therefore, voltage monitoring as a safety mechanism detects both undervoltage and overvoltage and, on an anomaly, resets the microcontroller or shuts off outputs.
Which is an appropriate voltage-monitoring safety mechanism…For example, even if the correction circuit of the ECC, a safety mechanism, is broken, it does not show up as long as there are no memory errors.
Which is the most appropriate example of a latent fault in …A safety mechanism must keep the sum of the time to detect the fault and the time from detection to reaching a safe state, for example by shutting off outputs, within the FTTI.
Which correctly describes the fault tolerant time interval …As an Amazon Associate I earn from qualifying purchases.
Diagnostic coverage Microcontroller ISO 26262 Fault coverage Lockstep CPU Comparator ECC (error-correcting code) FTTI (fault tolerant time interval) MTTF (mean time to failure) AEC-Q100