What is Atomic instruction?

An instruction that performs a memory read and write as one operation no other core can interrupt, such as CAS, fetch-and-add and LR/SC.

Field: Multicore & Synchronization

Atomic instruction in the explanations

Questions that mention Atomic instruction (3)

  1. Which describes an atomic instruction?
  2. Why does a spinlock usually wait with ordinary reads and use an atomic instruction only when the lock looks free (test-and-test-and-set), instead of retrying the atomic write directly?
  3. Which describes a spinlock?

Related terms

Spinlock Compare-and-swap Load-reserved/store-conditional (LR/SC) Interrupt ABA problem Acquire-release semantics Barrier synchronization Bus snooping Condition variable Critical section

Back to the glossary