What is Compare-and-swap?
An atomic instruction that writes a new value only if memory still holds an expected value. Wrapped in a retry loop, it enables lock-free updates.
Field: Multicore & Synchronization
Compare-and-swap in the explanations
Examples include CAS (compare-and-swap), fetch-and-add and RISC-V's LR/SC and AMO instructions, which are the building blocks of locks and lock-free data structures.
Which describes an atomic instruction?
Questions that mention Compare-and-swap (2)
Related terms
Atomic instruction Load-reserved/store-conditional (LR/SC) ABA problem Acquire-release semantics Barrier synchronization Bus snooping Condition variable Critical section Data race Deadlock