Power semiconductors

When a power MOSFET's gate is charged with a constant current, why does the gate voltage stay flat for a while (the Miller plateau)?

  1. ABecause the gate current stops
  2. BBecause the gate insulator temporarily breaks down
  3. CBecause while the drain voltage is changing, the gate current is used to charge and discharge the gate-drain capacitance
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Answer: C. Because while the drain voltage is changing, the gate current is used to charge and discharge the gate-drain capacitance

While the drain voltage swings widely during switching, the current fed into the gate goes into charging or discharging the gate-drain capacitance (Miller capacitance), so the gate voltage stays nearly constant. This flat region is the Miller plateau, and its length strongly affects switching speed and loss.

  • A. The gate current keeps flowing.
  • B. It is not a breakdown of the insulator.
  • C. Correct. The current goes into charging the Miller capacitance.
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More Power semiconductors questions

  1. Why is a negative gate voltage (for example, −3 to −5 V) sometimes applied to SiC MOSFETs or IGBTs in the off state?
  2. What maximum junction temperature (Tj max) is commonly specified for typical silicon power devices?
  3. When choosing power devices, why are devices with a voltage rating higher than the actual operating voltage used (derating)?
  4. When does the avalanche ruggedness of a power MOSFET become important?
  5. What is a typical failure seen in power cycling tests, which repeatedly heat and cool power modules?