Power Management

In chips using multiple supply voltages, why must the power-up order (power sequencing) be observed?

  1. AA wrong order can drive signals into unpowered circuits or push large currents through protection devices, causing malfunction, latch-up or damage
  2. BFollowing the order makes the chip run twice as fast
  3. CThe order is cosmetic and does not affect operation
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Answer: A. A wrong order can drive signals into unpowered circuits or push large currents through protection devices, causing malfunction, latch-up or damage

For example, if the I/O supply comes up before the core supply, current can flow from the I/O side into the unpowered core, or circuits in an undefined state may drive signals externally. Large currents through protection diodes can trigger latch-up or damage. So chip datasheets specify the order for powering up and down, and PMICs or similar control the supplies accordingly.

  • A. Correct. The order specified in the datasheet must be followed.
  • B. It has nothing to do with speed.
  • C. It affects operation and reliability.
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More Power Management questions

  1. What characterizes near-threshold operation, running with supply voltage lowered close to the transistor threshold?
  2. As supply voltage is lowered, total energy per operation reaches a minimum at some voltage and then rises if voltage is lowered further. Why?
  3. A 50 W CPU is fitted with a cooler of thermal resistance 0.5 K/W. Roughly how many degrees above ambient does the chip run (ignoring other heat paths)?
  4. Why are temperature sensors often placed at many locations within a large chip?
  5. In data centers packed with high-performance AI GPUs, why is liquid cooling spreading alongside air cooling?