DRAM
What does the CAS latency (CL) of DRAM mean?
- AThe refresh interval
- BThe number of clock cycles from a read command (specifying the column address) until data is output
- CThe supply voltage of the DRAM
Show answer and explanation
Answer: B. The number of clock cycles from a read command (specifying the column address) until data is output
CAS latency is the number of clock cycles from receiving a read command that specifies the column address until the first data is output. A smaller value means a faster response, but the actual time is the product with the clock period, so faster-clocked standards have larger CL numbers.