How to read datasheets
What is the main reason a logic IC's recommended operating conditions specify an upper limit on how slow input rise and fall can be (for example, 10 ns/V)?
- ABecause a slow input change overcharges the capacitance of the input pin, damaging the input pin
- BBecause an input lingering near the threshold increases shoot-through current or causes the output to oscillate
- CBecause the slower the input change, the shorter the propagation delay becomes, causing malfunction in later stages
Show answer and explanation
Answer: B. Because an input lingering near the threshold increases shoot-through current or causes the output to oscillate
A slowly changing input lingers at intermediate voltages where H/L recognition is undefined. During that time, the pMOS and nMOS of the input stage are both partially on, and shoot-through current flows from the supply to ground, increasing current consumption and heat. Noise can also make the decision flip H, L, H repeatedly, causing the output to oscillate. For this reason, the recommended operating conditions set a lower limit on input transition speed. When slow signals must be received, choose a product with Schmitt-trigger inputs that have hysteresis.