CPUs and architecture

In a pipeline, when the next instruction immediately uses the result of the previous one (a data hazard), which technique passes the result directly to the next instruction without waiting for it to be written to the register?

  1. AForwarding (bypassing)
  2. BVirtual memory
  3. CBranch prediction
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Answer: A. Forwarding (bypassing)

Forwarding (bypassing) routes the ALU output directly to the input of the following instruction without waiting for it to be written to the register file. It reduces pipeline stalls caused by data hazards. Branch prediction addresses control hazards caused by branches.

  • A. Correct. The result is routed directly to the next instruction.
  • B. Virtual memory manages address spaces and is not a hazard countermeasure.
  • C. Branch prediction addresses control hazards from branches.
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More CPUs and architecture questions

  1. Which correctly describes little-endian byte order?
  2. Which technique lets one CPU core process instructions from multiple threads at the same time to make better use of the core's execution units?
  3. In microcontrollers and similar devices, which scheme assigns peripheral registers to the same address space as memory and operates them with ordinary memory read/write instructions?
  4. What is the role of the watchdog timer built into microcontrollers?
  5. When a program calls a subroutine (function), which area is generally used to temporarily save the return address and similar information?