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Automotive Semiconductors and Functional Safety

Which correctly pairs the descriptions of random hardware failures and systematic failures as distinguished in ISO 26262?

  1. ARandom hardware failures occur probabilistically during use due to degradation, cosmic rays and so on, while systematic failures occur under specific conditions because of causes such as specification or design errors
  2. BRandom hardware failures occur under specific conditions because of specification or design errors, while systematic failures occur probabilistically during use
  3. CRandom hardware failures occur only in software, while systematic failures occur only in hardware
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Answer: A. Random hardware failures occur probabilistically during use due to degradation, cosmic rays and so on, while systematic failures occur under specific conditions because of causes such as specification or design errors

Random hardware failures, such as component degradation or bit flips from cosmic rays, are failures whose occurrence can be predicted only probabilistically; they are evaluated quantitatively with failure rates (FIT) using metrics such as SPFM and PMHF. Systematic failures are caused by missing requirements, design errors, software bugs and the like, and always recur when the same conditions are met. These are not evaluated probabilistically but prevented through development processes such as reviews and verification appropriate to the ASIL. Hardware design errors are also systematic failures.

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More Automotive Semiconductors and Functional Safety questions

  1. For PMHF, the metric for the probability that a safety goal is violated due to random hardware failures, the target guideline for ASIL D is less than 10 FIT. What is this expressed as a probability per hour?
  2. Which is the correct target guideline for the single-point fault metric (SPFM) required for ASIL D?
  3. Which is the most appropriate example of a latent fault in ISO 26262?
  4. The total failure rate of safety-related hardware is 1000 FIT, of which single-point faults and residual faults (faults that remain undetected by safety mechanisms) total 5 FIT. What is the single-point fault metric (SPFM)?
  5. A safety mechanism with 99% diagnostic coverage is added to a circuit with a failure rate of 200 FIT. What is the failure rate of the faults that remain undetected by the safety mechanism?