What is Non-uniform memory access (NUMA)?

An organization in which each core has near and far memory, and far accesses take longer. Placing data and threads on the same side is faster.

Field: Multicore & Synchronization

Non-uniform memory access (NUMA) in the explanations

Questions that mention Non-uniform memory access (NUMA) (4)

  1. Which describes a NUMA (non-uniform memory access) system?
  2. Under the first-touch policy common on Linux NUMA systems (a page is placed in the memory of the node where the thread first writing it runs), what should programmers watch out for?
  3. When measuring performance on multicore or NUMA systems, why are threads sometimes pinned to specific cores (setting affinity)?
  4. In most current PC processors, where is the memory controller that controls DRAM located?

Related terms

Page fault ABA problem Acquire-release semantics Atomic instruction Barrier synchronization Bus snooping Compare-and-swap Condition variable Critical section Data race

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