Power Management

With the supply voltage unchanged, only the clock frequency is halved. What happens to the dynamic energy needed to finish a fixed amount of computation?

  1. AIt stays about the same (power halves but time doubles)
  2. BIt halves
  3. CIt falls to a quarter
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Answer: A. It stays about the same (power halves but time doubles)

Dynamic power is proportional to f, so halving the frequency halves the power. But the same computation takes twice as long, so energy, power times time, is unchanged, because the energy per switching event is set by CV². Reducing energy requires lowering voltage; lowering frequency is what allows the circuit to work correctly at that lower voltage.

  • A. Correct. Energy = power × time.
  • B. Power halves, but time doubles.
  • C. Without lowering voltage it does not fall that far.
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More Power Management questions

  1. Assume DVFS can lower the supply voltage in proportion to frequency. When frequency is halved, roughly what happens to dynamic power and to the dynamic energy for a fixed amount of computation?
  2. Which describes static (leakage) power in CMOS circuits?
  3. How does leakage power change as chip temperature rises, and what problem can result?
  4. Which describes power gating?
  5. Which correctly pairs a caveat of power-gated blocks with its countermeasure?