CPUs and architecture

Which correctly lists the "three Cs" classification of cache misses?

  1. AWrite, read and branch misses
  2. BClock, voltage and temperature misses
  3. CCompulsory, capacity and conflict misses
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Answer: C. Compulsory, capacity and conflict misses

Cache misses are classified as compulsory misses (from the first access to data), capacity misses (data evicted because the cache is too small) and conflict misses (competition for the same set). Countermeasures include line size and prefetching, larger capacity and higher associativity, respectively.

  • A. It is not a classification by type of access.
  • B. It is not a classification by operating conditions.
  • C. Correct. Compulsory, capacity and conflict.
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  2. What is the main purpose of register renaming in out-of-order CPUs?
  3. In AI accelerators and similar, which architecture arranges many multiply-accumulate units in a grid and computes matrix products by passing data from one unit to the next?
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