CPUs and architecture

In AI accelerators and similar, which architecture arranges many multiply-accumulate units in a grid and computes matrix products by passing data from one unit to the next?

  1. ASystolic array
  2. BCrossbar switch
  3. CRing buffer
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Answer: A. Systolic array

A systolic array places multiply-accumulate (MAC) units in two dimensions and computes while passing data regularly to neighboring units. Data loaded once is reused by many units, reducing memory accesses and making matrix operations efficient. It is used, for example, in Google's TPU.

  • A. Correct. Units are arranged in a grid and compute as data flows through.
  • B. A crossbar switch is an interconnect that freely connects many inputs and outputs.
  • C. A ring buffer is a data storage area used cyclically.
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More CPUs and architecture questions

  1. Which model plots whether a program's performance is limited by compute throughput or memory bandwidth, using arithmetic intensity (operations per byte) on the horizontal axis?
  2. What is the main purpose of pipelining in a CPU?
  3. What is the main purpose of cache memory?
  4. Which is a characteristic of a von Neumann computer?
  5. What is the main purpose of putting multiple processor cores on one chip (multicore)?