ISA & Assembly

What is the main purpose of the RISC-V C extension (compressed instructions)?

  1. ATo add instructions that compress data and reduce memory use
  2. BTo let the CPU run C programs directly
  3. CTo encode common instructions in 16 bits and make programs smaller
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Answer: C. To encode common instructions in 16 bits and make programs smaller

The C extension represents common instructions in 16-bit forms with restricted fields, for example "addi sp, sp, -16" or lw and sw with small offsets. They mix freely with 32-bit instructions and typically shrink code by about 25-30%. Smaller programs fit more easily in limited flash memory and more of them fit in the instruction cache, which helps both embedded devices and high-performance CPUs.

  • A. It does not compress data.
  • B. C stands for compressed, unrelated to the C language.
  • C. Correct. Code size shrinks by roughly 25-30%.
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More ISA & Assembly questions

  1. When C's "a * b" (multiplying two ints) is compiled for an RV32I CPU without the M extension, what generally happens?
  2. What is true of the branch delay slot found in older ISAs such as MIPS (the rule that the one instruction right after a branch always executes, taken or not)?
  3. On 64-bit RV64I, how does lw place the 32-bit value it loads into a 64-bit register?
  4. Which correctly describes an ABI (application binary interface)?
  5. How is a call through a C function pointer, "(*fp)(x)", generally performed in RISC-V?