Hardware Security: Advanced Topics and Trends
Which correctly describes the idea of PRAC (per-row activation counting), added to the DDR5 standard updated in 2024 (JESD79-5C)?
- AThe memory controller stops counting activations, and all refreshes inside the DRAM are also carried out by the external controller commanding them one row at a time
- BThe DRAM counts activations per row and, if a row exceeds a threshold, notifies the controller and obtains time to refresh the neighbouring rows
- CA row activated more often than a set number of times is permanently disabled by the DRAM and replaced by a spare row prepared at manufacturing
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Answer: B. The DRAM counts activations per row and, if a row exceeds a threshold, notifies the controller and obtains time to refresh the neighbouring rows
Earlier countermeasures had in-DRAM TRR track only a few rows or, as with DDR5 RFM, had the memory controller count activations per bank and give the DRAM extra time. With PRAC the DRAM keeps a counter for each row and counts that row's activations every time, so nothing is missed because of a limit on how many rows can be tracked. When a count exceeds the threshold, the DRAM notifies the controller, has accesses paused for a while and refreshes the area around the targeted row. Updating the counters is said to lengthen timing parameters such as the time to close a row, so there is a trade-off with performance.
- A. PRAC counts activations per row inside the DRAM; it is not a mechanism in which all refreshes are commanded from outside.
- B. Correct. Rows are counted exactly, and time for countermeasures is requested when needed.
- C. Rows are not disabled; flips are prevented by refreshing the neighbouring rows.
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