How to read datasheets
What is the main problem when many CMOS inputs are connected to a single output of a CMOS logic IC?
- AThe total DC current into the inputs reaches the mA range, and the output can no longer hold the high level
- BThe output's high-level voltage rises above the supply voltage in proportion to the number of connected inputs
- CThe total input capacitance becomes large, slowing the signal's rise and fall and increasing the propagation delay
Show answer and explanation
Answer: C. The total input capacitance becomes large, slowing the signal's rise and fall and increasing the propagation delay
The number of inputs connected to one output is called the fan-out. The DC input current of a CMOS input is small—a few µA or less even at max—so considering DC current alone, fan-out is hardly limited. In practice, each input adds a few pF of input capacitance in parallel, so the more inputs there are, the longer charging and discharging take and the greater the delay. Datasheet propagation delays are specified under load capacitance conditions such as CL = 15 pF or 50 pF, so read them against the total capacitance including wiring.