Write-Allocate vs No-Write-Allocate: Write-Miss Behavior, Traffic and Pairing Compared
Write-allocate and no-write-allocate are policies that decide whether a line is brought into the cache when a write misses. With write-allocate, the cache first reads the line from the level below and then performs the write in the cache. With no-write-allocate, the line is not fetched and the write is sent straight to the level below. This is a separate choice from write-back vs write-through, which decide when a write that hits reaches the level below, but write-allocate is usually paired with write-back and no-write-allocate with write-through.
| Aspect | Write-allocate | No-write-allocate |
|---|---|---|
| On a write miss | Reads the whole line from the level below, places it in the cache, then writes into it | Leaves the cache untouched and sends the write directly to the level below |
| Line fill (read) | Required. On multicore systems it is a read for ownership (RFO) that invalidates other cores' copies before the write, so a store miss looks like a read on the memory bus | Not needed; only the written data is sent to the level below |
| Usual pairing | Write-back: later writes to the fetched line hit and are absorbed without memory traffic, which pays back the cost of the initial read | Write-through: every write goes to the level below anyway, so fetching the line would not reduce write traffic |
| Traffic to the level below | Lower when the same line is written many times or the written data is read back | Each missing write goes out every time, but no extra reads are generated |
| Large write-only data (clearing memory, writing output) | Each line is read only to be overwritten and later written back, roughly doubling traffic, and useful data is evicted from the cache | No reads and no cache pollution, so it suits this kind of data |
| Reading right after writing | The line is in the cache, so the read hits | The line is not in the cache, so the read misses and fetches it |
| Implementation techniques | For write-only data, non-temporal (streaming) stores bypass the cache and send combined writes straight to main memory; some ISAs also have an instruction that zeroes a whole line without reading its old contents | A write buffer hides write latency, and it often merges several writes to the same line into one transfer |
| Where it is used | Common in write-back caches; most CPU L1 to L3 caches are write-back | Common in write-through caches, such as a small L1 backed by a write-back L2, or simple embedded processors |
Figures are typical orders of magnitude and vary by process generation and product.