What is Tri-state buffer?

A buffer that can output 0, 1 or a disconnected high-impedance state. It prevents output conflicts when several circuits share one bus.

Field: Logic circuits

Tri-state buffer in the explanations

Questions that mention Tri-state buffer (1)

  1. What is the third state that the output of a tri-state buffer can take?

Related terms

Clock skew Combinational circuit De Morgan's theorem Decoder Flip-flop Full adder Glitch Gray code Hold time Karnaugh map

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