Which architecture runs several AD converters alternately with slightly staggered timing to achieve a high overall sampling rate?

Answer: A. Time-interleaved

In a time-interleaved converter, for example, four ADCs are staggered by a quarter period to achieve four times the sampling rate of one ADC. Mismatches in offset, gain and timing between the ADCs create spurs (unwanted signal components), so calibration techniques are important.