What is Memory-mapped I/O?

Assigning peripheral registers to specific addresses in the same address space as memory and accessing them with ordinary load and store instructions. That region is configured as uncached.

Field: OS & Hardware

Memory-mapped I/O in the explanations

Questions that mention Memory-mapped I/O (2)

  1. When reading a device status register via memory-mapped I/O as above, why is it declared volatile and the region configured as uncached?
  2. In microcontrollers and similar devices, which scheme assigns peripheral registers to the same address space as memory and operates them with ordinary memory read/write instructions?

Related terms

ASID Context switch Copy-on-write Demand paging Device driver Hypervisor Interrupt handler Interrupt vector table IOMMU Nested paging

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